New IBM CPU is double-quick (and a blotch twig)

Whoosh! It's Tuesday's IT Blogwatch: in which IBM releases the POWER6. Not to mention the Anagram Hall of Fame...

Jeremy Kirk rushed to bring us this:

Facing a slowing Unix market, IBM today released its Power6 processor, its fastest chip yet for high-end servers. The chip runs at double the speed of the Power5 line but uses the same amount of power. The company also launched a server based on the chip, the System p 570, which will be available in configurations with two to 16 cores. It employs new virtualization technologies to reduce power consumption while keeping performance up.
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With the release of the Power6, IBM is taking aim at competitors in the Unix market, including Hewlett-Packard Co. and Sun Microsystems Inc. ... IBM claims the Power6 chip is three times faster than the Itanium processor that HP uses in its Superdome servers and has a bandwidth 30 times greater, at 300GB/sec.
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The Power6 is a dual-core processor that runs at 4.7 GHz. Those two cores use symmetric multithreading technology that allows them to appear as four cores, each of which can execute instruction threads. It means that heavy processing, such as that involved in airplane design or automotive crash simulations, can occur much faster.

Lode Vermeiren adds:

While current tests are based on AIX 5.3, a new release of IBM’s own UNIX operating system, AIX 5.4 is expected shortly. This new release will include cool new features like Partition Mobility. This feature, comparable to VMotion in the VMware ESX world, will enable users to move active micro-partitions between systems. This reduces the impact of planned outages and upgrades.

The Power6 cpu is binary compatible with prior systems, and will be included across IBM’s server range: System i (previously AS/400), System p (previously known as pSeries, mainly AIX/Linux based systems) and System z (mainframe). In the next quarter a new IBM Blade server featuring the Power6 cpu will be introduced as well

The Power6 is a dual core chip with 8 MB of level 2 cache on the chip. Every core consists of 9 “execution units”. This systems allow up to 1024 partitions (double the amount per core versus the Power5 cpu).

And that flushed Richard Partridge out of the cover: [You're fired -Ed.]

POWER6 is an impressive chip that demonstrates the prowess of IBM’s semiconductor manufacturing and processor design teams. Typically, performance leadership trophies change hands as each vendor introduces its latest chips and systems that leapfrog prior generation products. Not unexpectedly, IBM touts its POWER6-powered p 570 as capturing top spot for a midrange system across about two dozen benchmarks, including TPC-C and SPECjbb2005. However, IBM is not likely to have to relinquish those performance trophies anytime soon, since POWER6 appears to have comfortable lead in performance per processor core.
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What sets IBM apart from its competitors is its ability to continue to drive clock rates higher while staying within desired power-consumption targets. As IBM proudly points out, at 4.7 GHz POWER6 doubles the clock rate of its prior POWER5 chip family. No other chip vendor has been able to accomplish that in recent memory
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Although skeptics once questioned whether IBM had the chip volumes to justify advanced semiconductor investment, the vast quantities of gaming console chips clearly helped defray much of the investment in leading-edge technology ... Many applications legitimately do value the single-threaded performance offered by POWER6’s fast clock rate. For those applications, POWER6 holds a substantial lead over its competitors.

IBM's Michael Dolan gushes:

This chip is simply groundbreaking. Extreme power handling features to address electric and heat issues, processor decimal floating point (yes, that means not binary; no, I have no clue how they do it), partition live migration/mobility, and day 1 support for Linux ;-) btw, Red Hat made quite a few “tweaks” to optimize RHEL/ppc configurations out of the box for the POWER6 machines.

Mark Fontecchio has pictures:

IBM Corp. announced today that its Power6 processor will appear first in its System p servers running AIX Unix ... IBM is touting the dual-core Power6 as a 4.7 GHz chip, which is more than twice the speed as its predecessor, the Power5, but not as fast as the 5 and 6 GHz IBM was boasting of last year. The thumbnail-sized chip will generate less than 100 watts of power, according to Big Blue. It has a total cache of 8MB per chip - four times that of the Power5 - and IBM says it is capable of downloading the entire iTunes catalog in one minute.

The first server running the Power6 will be the System p5 570, which IBM claims is the No. 1 performer on four Unix server benchmarks: SPECint2006, SPECfp2006, SPECjbb2006, and TPC-C. System i servers using Power6 chips are expected late this year or early next.

What we need now is something from Jon "Hannibal" Stokes. Ah, I love it when a plan comes together: [Are you still here? -Ed.]

Ah, if only Apple would've stuck with PowerPC, maybe it could've skipped the magical 3GHz mark and jumped straight to 4.7GHz. Okay, that's really just a cheap shot, but I couldn't resist, given today's major announcement by IBM that the 65nm POWER6 will not only debut next month at a stratospheric 4.7GHz, but it also shreds most of the relevant benchmarks.
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Serious questions remain about the POWER6 core architecture; questions on which IBM has kept decidedly mum. These questions center on the chip's out-of-order execution capabilities or the potential lack thereof. It's a good bet that one of the tricks that IBM used to get POWER6's clockspeed up so high was that the design team stripped away a ton of complexity from the pipeline by removing the out-of-order execution window. IBM has stated that floating-point instructions can issue out-of-order, but such issuing is certainly very limited in order to cut down on bookkeeping overhead.
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Not only has IBM nearly doubled the frequency of the POWER5 design, but it has nearly doubled the benchmarks scores as well. Indeed, IBM is so happy with the benchmark results that it has dedicated an entire section of their site to publishing POWER6 benchmarks on a whole slew of different types of workloads ...

• TPC-C ... at the top of the 16-core pack with a score of 1,616,162 tpmC ...
• Oracle Applications Standard Online Benchmark ... 8-core POWER6 system doubling the performance of its POWER5 predecessor ...
• specjbb2005 ... (16-core) clocks in at 691,975 business operations per second (bops) ...
• CPU2006 ... specint of 21.6 and a specfp of 22.3 (both are single-core, single-threaded numbers) ...

Ultimately, there's a lot that can and should be said about what IBM did to bring about such a dramatic boost in clock frequency with POWER6, but that will have to wait for a separate article.

Buffer overflow:

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Previously in IT Blogwatch

• Wi-Fi causes child cancer? (and fair-y tale use)
• FCC OKs iPhone, but iPhony delay (and moon fishing)
• Amazon antagonizes Apple with DRM-free music (and but is it art?)
• Sun's CEO slaps down Microsoft (and power-tool dragsters)
• No YouTube for you, private! (and Gears of Bore)
• Older posts

And finally... A Flagman Harem Loaf

Richi Jennings is an independent technology and marketing consultant, specializing in email, blogging, Linux, and computer security. A 20 year, cross-functional IT veteran, he is also an analyst at Ferris Research. Contact Richi at blogwatch@richi.co.uk.